By Yoshiyasu Takefuji (auth.), Yoshiyasu Takefuji (eds.)
This publication brings jointly in a single position vital contributions and state of the art learn within the speedily advancing region of analog VLSI neural networks.
The publication serves as an exceptional reference, delivering insights into one of the most vital concerns in analog VLSI neural networks examine efforts.
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This publication brings jointly in a single position vital contributions and state of the art study within the quickly advancing zone of analog VLSI neural networks. The publication serves as a very good reference, supplying insights into essentially the most vital matters in analog VLSI neural networks learn efforts.
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Extra info for Analog VLSI Neural Networks: A Special Issue of Analog Integrated Circuits and Signal Processing
E. E. Hubbard, ''A programmable analog neural network chip," IEEE 1. Solid-State Circuits, Vol. 24, pp. 313-319, 1989. 14. D. P. E. Howard, "Electronic neural network chips," Appl. Opt. Vol. 26, pp. 5077-5080, 1987. 15. FJ. K. Moon, LA. M. Long, "Programmable analog vector-matrix multipliers," IEEE 1. Solid-State Circuits Vol. 25, pp. 207-214, 1990. 16. P. Eberhardt, T. P.
Testing performed on these circuits was generally limited to de functionality as available test resources did not permit full-bandwidth ac or real-time response testing, due primarily to capacitive loading of input and output nodes. Consequently, SPICE simulation results are given to represent the ac frequency or transient response of the circuits. Test results were obtained from either two or three die. 75 mAo Simulated unity-gain bandwidth into the l-kO load is in excess of 20 MHz. Several of the subblocks for the nonlinear normalization circuitry were successfully fabricated and tested.
Mueller and co-workers have reported an intermediate approach with a chipset retaining some notable features of biological neurons but allowing programmable interconnection into general networks . 35 298 Shoemaker, Hutchens and Patil An outstanding problem in analog networks is the practical implementation of learning, which in the neural network field usually comprises some algorithmic procedure for modification of interconnection weights between neuronal analogs in response to stimuli and possibly desired response or other feedback presented to the network.